x86-64 Reference Tables and Encoding Atlas

About this book

**x86-64 Reference Tables and Encoding Atlas — Volume 5** is a compact, implementation-oriented desk reference designed to place the most frequently needed x86-64 encoding information within immediate reach. Rather than requiring developers to repeatedly navigate thousands of pages of architectural documentation, this volume organizes essential encoding structures, processor conventions, and binary-format relationships into practical tables, maps, and quick-reference material.

The book brings together the core elements needed when **encoding, decoding, debugging, verifying, or analyzing x86-64 machine instructions**. It is intended for assembler and disassembler developers, compiler and JIT engineers, binary-tool authors, operating-system programmers, debugger developers, reverse engineers, and anyone working directly with x86-64 machine code.

The reference begins with the architectural register model, covering **general-purpose registers, instruction pointers, flags, segment registers, control and system registers, x87 state, SIMD/vector registers, opmask registers, and other important architectural register classes**. Register relationships are presented alongside the encoding fields used to identify them.

A major section summarizes **operand-size and address-size rules**, helping implementers quickly determine how execution mode, prefixes, instruction forms, and register selection affect the interpretation and encoding of operands and effective addresses.

The atlas organizes the major x86 encoding generations and prefix families:

**Legacy prefixes → REX → VEX → EVEX and modern extension mechanisms**

Related tables explain **opcode maps, mandatory prefixes, opcode extensions, ModR/M fields, SIB encoding, displacement forms, immediate values, and effective-address construction**. These references provide a compact way to solve the individual fields that ultimately form an x86-64 machine instruction.

Particular attention is given to **ModR/M and SIB**, two of the most important structures in practical x86 encoding. Tables map register and memory forms to their binary fields and document special cases involving base registers, index registers, scale factors, displacements, and RIP-relative addressing.

The volume also provides quick references for **immediate and displacement sizes, sign extension, relative offsets, status flags, condition codes, conditional branches, conditional moves, and related instruction relationships**. These tables are especially useful when implementing instruction selection, encoding, decoding, or verification logic.

Because instruction availability cannot be separated from processor evolution, the atlas includes references connecting **instruction families with CPU features and architectural extensions**. This helps developers distinguish baseline instructions from capabilities introduced through SSE, AVX, AVX2, AVX-512, cryptographic extensions, AMX, and other processor features.

The book additionally connects instruction encoding with the surrounding binary toolchain through reference material for **sections, symbols, relocations, and object-file relationships**. These tables help bridge the gap between emitting individual instructions and producing relocatable machine code suitable for processing by a linker.

Unlike a tutorial that is primarily read from beginning to end, this volume is designed to remain beside the developer as a **working encoding atlas**. Its purpose is rapid lookup: identify a field, consult the relevant table, resolve the encoding decision, and return immediately to implementation or debugging.

Together with **Volume 1: Foundations of x86-64 Instruction Encoding**, **Volume 2: General-Purpose x86-64 Instruction Encoding**, **Volume 3: SIMD and Floating-Point x86-64 Instruction Encoding**, and **Volume 4: Assembler Design and Implementation Guide**, Volume 5 completes the series as its practical desk-side companion—consolidating the structures, tables, maps, and relationships needed for everyday x86-64 assembler, compiler, disassembler, JIT, and binary-tool engineering.